Tiny - Optimised 3D mesh NoC for area and latency minimisation

C. Marcon; T. Webber; R. Fernandes; R. Cataldo; F. Grando; L. Poehls; A. Benso

doi:10.1049/el.2013.2557

Tiny - Optimised 3D mesh NoC for area and latency minimisation

C. Marcon, T. Webber, R. Fernandes, R. Cataldo, F. Grando, L. Poehls, A. Benso

School of Computer Science

Research output: Contribution to journal › Article › peer-review

5 Citations (Scopus)

Abstract

Tiny is a scalable and efficient three-dimensional (3D) network-onchip (NoC) designed to reduce latency and area. A theoretical analysis demonstrates its efficiency when compared with a basic 3D mesh NoC. Mapping independent traffics with different injection rates makes the trade-offs analysis of Tiny possible. Results highlight that Tiny always reduces area and for several cases minimises latency.

Original language	English
Pages (from-to)	165-166
Number of pages	2
Journal	Electronics Letters
Volume	50
Issue number	3
DOIs	https://doi.org/10.1049/el.2013.2557
Publication status	Published - 30 Jan 2014

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10.1049/el.2013.2557

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@article{b3c9138ebd084988b88ae6163b1b735a,

title = "Tiny - Optimised 3D mesh NoC for area and latency minimisation",

abstract = "Tiny is a scalable and efficient three-dimensional (3D) network-onchip (NoC) designed to reduce latency and area. A theoretical analysis demonstrates its efficiency when compared with a basic 3D mesh NoC. Mapping independent traffics with different injection rates makes the trade-offs analysis of Tiny possible. Results highlight that Tiny always reduces area and for several cases minimises latency.",

author = "C. Marcon and T. Webber and R. Fernandes and R. Cataldo and F. Grando and L. Poehls and A. Benso",

year = "2014",

month = jan,

day = "30",

doi = "10.1049/el.2013.2557",

language = "English",

volume = "50",

pages = "165--166",

journal = "Electronics Letters",

issn = "0013-5194",

publisher = "Institution of Engineering and Technology",

number = "3",

}

TY - JOUR

T1 - Tiny - Optimised 3D mesh NoC for area and latency minimisation

AU - Marcon, C.

AU - Webber, T.

AU - Fernandes, R.

AU - Cataldo, R.

AU - Grando, F.

AU - Poehls, L.

AU - Benso, A.

PY - 2014/1/30

Y1 - 2014/1/30

N2 - Tiny is a scalable and efficient three-dimensional (3D) network-onchip (NoC) designed to reduce latency and area. A theoretical analysis demonstrates its efficiency when compared with a basic 3D mesh NoC. Mapping independent traffics with different injection rates makes the trade-offs analysis of Tiny possible. Results highlight that Tiny always reduces area and for several cases minimises latency.

AB - Tiny is a scalable and efficient three-dimensional (3D) network-onchip (NoC) designed to reduce latency and area. A theoretical analysis demonstrates its efficiency when compared with a basic 3D mesh NoC. Mapping independent traffics with different injection rates makes the trade-offs analysis of Tiny possible. Results highlight that Tiny always reduces area and for several cases minimises latency.

UR - http://www.scopus.com/inward/record.url?scp=84893338472&partnerID=8YFLogxK

U2 - 10.1049/el.2013.2557

DO - 10.1049/el.2013.2557

M3 - Article

AN - SCOPUS:84893338472

SN - 0013-5194

VL - 50

SP - 165

EP - 166

JO - Electronics Letters

JF - Electronics Letters

IS - 3

ER -

Tiny - Optimised 3D mesh NoC for area and latency minimisation

Abstract

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