Abstract
This paper discusses the impact of routing arbitration mechanism on the packet latency for 3D NoC (Three-dimensional Network-on-Chip) architectures. We implemented several variations of Round-Robin mechanisms to explore how the arbitration efficiency affects the packet latency. The underlying objective is to discuss the compromise of increase router area and energy consumption through investing on a complex low-clock cycle router compared with a simpler but energy and area efficient router. The experimental setup is composed of two sizes of 3D mesh NoC, synthetic traffic pattern and several injection rates. Results demonstrate that the increase of arbitration latency does not affect proportionally the packet latency. In fact, for low traffic injection rates the arbitration algorithm does not influence the average of packet latency significantly, justifying the approach of employing less complex routers with less impact on area and energy consumption.
| Original language | English |
|---|---|
| Title of host publication | 2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 890-894 |
| Number of pages | 5 |
| ISBN (Electronic) | 9781479942428 |
| DOIs | |
| Publication status | Published - 25 Feb 2015 |
| Event | 2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014 - Marseille, France Duration: 7 Dec 2014 → 10 Dec 2014 |
Publication series
| Name | 2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014 |
|---|
Conference
| Conference | 2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014 |
|---|---|
| Country/Territory | France |
| City | Marseille |
| Period | 7/12/14 → 10/12/14 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
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