Task partitioning optimization algorithm for energy saving and load balance on NoC-based MPSoCs

Marco P. Stefani, Thais Webber, Ramon Fernandes, Rodrigo Cataldo, Letícia B. Poehls, César Marcon

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Multiprocessor System-on-Chip (MPSoC) based on Network-on-Chip (NoC) integrates a large amount of Processor Elements (PEs) to fulfill the performance requirements of several applications. These applications are composed of a set of intercommunicating tasks, which are dynamically mapped onto PEs of the target architecture. However, the efficient task-mapping requires some previous steps, among them partitioning, which organizes tasks considering their interaction before applying a mapping process. This paper introduces Partition Reduce (PR) - a task partitioning approach based on the MapReduce algorithm targeting homogeneous NoC based MPSoCs. We analyze the efficiency of PR for energy consumption (EC) minimization and load balance (LB). The results obtained from a set of experiments, with large number of tasks, demonstrate that PR is more effective on processing time and result quality when compared to the classic Simulated Annealing (SA). In addition, PR produces partitions with low energy consumption and rigorous load balance.

Original languageEnglish
Title of host publicationProceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015
PublisherIEEE Computer Society
Pages130-134
Number of pages5
ISBN (Electronic)9781479975815
DOIs
Publication statusPublished - 13 Apr 2015
Event16th International Symposium on Quality Electronic Design, ISQED 2015 - Santa Clara, United States
Duration: 2 Mar 20154 Mar 2015

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
Volume2015-April
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Conference

Conference16th International Symposium on Quality Electronic Design, ISQED 2015
Country/TerritoryUnited States
CitySanta Clara
Period2/03/154/03/15

Keywords

  • energy efficiency
  • homogeneous MPSoC
  • load balance
  • NoC
  • Partitioning algorithm
  • performance evaluation

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