Room temperature memory operation of a single InAs quantum dot layer in a GaAs/AlGaAs heterostructure

C. R. Mueller*, L. Worschech, J. Heinrich, Sven Höfling, A. Forchel

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

22 Citations (Scopus)

Abstract

Room temperature (RT) memory operation of a single InAs quantum dot (QD) layer serving as floating gate is demonstrated. In an in-plane gated quantum-wire transistor, the charge state of the self-assembled InAs QDs is controlled by the applied gate voltage. Due to the floating-gate function of the QDs on a nearby transport channel, threshold hysteresis exceeding 200 mV and storage times of several minutes are observed. The RT operation is attributed to an optimized positioning of the QDs at the site of a local minimum in the AlGaAs conduction band. (C) 2008 American Institute of Physics.

Original languageEnglish
Article number063502
Number of pages3
JournalApplied Physics Letters
Volume93
Issue number6
DOIs
Publication statusPublished - 11 Aug 2008

Keywords

  • FIELD-EFFECT TRANSISTOR
  • CHANNEL
  • DEVICES

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