Pre-mapping algorithm for heterogeneous MPSoCs

Cesar Marcon; Thais Webber; Leticia B. Poehls; Igor K. Pinotti

doi:10.1109/VLSID.2014.50

Pre-mapping algorithm for heterogeneous MPSoCs

Cesar Marcon
, Thais Webber
, Leticia B. Poehls
, Igor K. Pinotti

School of Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A Multiprocessor System-on-Chip (MPSoC) composed of different types of processors is known as heterogeneous MPSoC. This kind of MPSoC based on Network-on-Chip (NoC) is a promising target architecture to fulfill requirements of high processing and communicating rate, enabling the execution of several tasks at the same time. Among the challenges in current heterogeneous MPSoC design is the partitioning of application tasks aiming for the energy saving and for a fair load balance. This work's contribution is twofold: (i) a partitioning algorithm is developed, and (ii) the evaluation of using partitioning as a pre-mapping task is explored. This work analyzes and compares stochastic and new heuristic partitioning algorithms for obtaining low energy consumption and for load balance when applied to tasks partitioning onto heterogeneous MPSoC. In addition, simulated results indicate that the static partitioning technique could be applied to application tasks before mapping activities in order to improve the quality of the static or dynamic mapping design and also to minimize the processing time.

Original language	English
Title of host publication	Proceedings - 27th International Conference on VLSI Design, VLSID 2014; Held Concurrently with 13th International Conference on Embedded Systems Design
Pages	252-257
Number of pages	6
DOIs	https://doi.org/10.1109/VLSID.2014.50
Publication status	Published - 2014
Event	27th International Conference on VLSI Design, VLSID 2014 - Held Concurrently with 13th International Conference on Embedded Systems Design - Mumbai, India Duration: 5 Jan 2014 → 9 Jan 2014

Publication series

Name	Proceedings of the IEEE International Conference on VLSI Design
ISSN (Print)	1063-9667

Conference

Conference	27th International Conference on VLSI Design, VLSID 2014 - Held Concurrently with 13th International Conference on Embedded Systems Design
Country/Territory	India
City	Mumbai
Period	5/01/14 → 9/01/14

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

Keywords

Heterogeneous MPSoC
Mapping
Partitioning

Access to Document

10.1109/VLSID.2014.50

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Cite this

Marcon, C., Webber, T., Poehls, L. B., & Pinotti, I. K. (2014). Pre-mapping algorithm for heterogeneous MPSoCs. In Proceedings - 27th International Conference on VLSI Design, VLSID 2014; Held Concurrently with 13th International Conference on Embedded Systems Design (pp. 252-257). Article 6733139 (Proceedings of the IEEE International Conference on VLSI Design). https://doi.org/10.1109/VLSID.2014.50

@inproceedings{b0cbe6ee869a4862aaf90225c8ada34b,

title = "Pre-mapping algorithm for heterogeneous MPSoCs",

abstract = "A Multiprocessor System-on-Chip (MPSoC) composed of different types of processors is known as heterogeneous MPSoC. This kind of MPSoC based on Network-on-Chip (NoC) is a promising target architecture to fulfill requirements of high processing and communicating rate, enabling the execution of several tasks at the same time. Among the challenges in current heterogeneous MPSoC design is the partitioning of application tasks aiming for the energy saving and for a fair load balance. This work's contribution is twofold: (i) a partitioning algorithm is developed, and (ii) the evaluation of using partitioning as a pre-mapping task is explored. This work analyzes and compares stochastic and new heuristic partitioning algorithms for obtaining low energy consumption and for load balance when applied to tasks partitioning onto heterogeneous MPSoC. In addition, simulated results indicate that the static partitioning technique could be applied to application tasks before mapping activities in order to improve the quality of the static or dynamic mapping design and also to minimize the processing time.",

keywords = "Heterogeneous MPSoC, Mapping, Partitioning",

author = "Cesar Marcon and Thais Webber and Poehls, \{Leticia B.\} and Pinotti, \{Igor K.\}",

note = "Copyright: Copyright 2014 Elsevier B.V., All rights reserved.; 27th International Conference on VLSI Design, VLSID 2014 - Held Concurrently with 13th International Conference on Embedded Systems Design ; Conference date: 05-01-2014 Through 09-01-2014",

year = "2014",

doi = "10.1109/VLSID.2014.50",

language = "English",

isbn = "9781479925124",

series = "Proceedings of the IEEE International Conference on VLSI Design",

pages = "252--257",

booktitle = "Proceedings - 27th International Conference on VLSI Design, VLSID 2014; Held Concurrently with 13th International Conference on Embedded Systems Design",

}

Marcon, C, Webber, T, Poehls, LB & Pinotti, IK 2014, Pre-mapping algorithm for heterogeneous MPSoCs. in Proceedings - 27th International Conference on VLSI Design, VLSID 2014; Held Concurrently with 13th International Conference on Embedded Systems Design., 6733139, Proceedings of the IEEE International Conference on VLSI Design, pp. 252-257, 27th International Conference on VLSI Design, VLSID 2014 - Held Concurrently with 13th International Conference on Embedded Systems Design, Mumbai, India, 5/01/14. https://doi.org/10.1109/VLSID.2014.50

Pre-mapping algorithm for heterogeneous MPSoCs. / Marcon, Cesar; Webber, Thais; Poehls, Leticia B. et al.
Proceedings - 27th International Conference on VLSI Design, VLSID 2014; Held Concurrently with 13th International Conference on Embedded Systems Design. 2014. p. 252-257 6733139 (Proceedings of the IEEE International Conference on VLSI Design).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Pre-mapping algorithm for heterogeneous MPSoCs

AU - Marcon, Cesar

AU - Webber, Thais

AU - Poehls, Leticia B.

AU - Pinotti, Igor K.

PY - 2014

Y1 - 2014

N2 - A Multiprocessor System-on-Chip (MPSoC) composed of different types of processors is known as heterogeneous MPSoC. This kind of MPSoC based on Network-on-Chip (NoC) is a promising target architecture to fulfill requirements of high processing and communicating rate, enabling the execution of several tasks at the same time. Among the challenges in current heterogeneous MPSoC design is the partitioning of application tasks aiming for the energy saving and for a fair load balance. This work's contribution is twofold: (i) a partitioning algorithm is developed, and (ii) the evaluation of using partitioning as a pre-mapping task is explored. This work analyzes and compares stochastic and new heuristic partitioning algorithms for obtaining low energy consumption and for load balance when applied to tasks partitioning onto heterogeneous MPSoC. In addition, simulated results indicate that the static partitioning technique could be applied to application tasks before mapping activities in order to improve the quality of the static or dynamic mapping design and also to minimize the processing time.

AB - A Multiprocessor System-on-Chip (MPSoC) composed of different types of processors is known as heterogeneous MPSoC. This kind of MPSoC based on Network-on-Chip (NoC) is a promising target architecture to fulfill requirements of high processing and communicating rate, enabling the execution of several tasks at the same time. Among the challenges in current heterogeneous MPSoC design is the partitioning of application tasks aiming for the energy saving and for a fair load balance. This work's contribution is twofold: (i) a partitioning algorithm is developed, and (ii) the evaluation of using partitioning as a pre-mapping task is explored. This work analyzes and compares stochastic and new heuristic partitioning algorithms for obtaining low energy consumption and for load balance when applied to tasks partitioning onto heterogeneous MPSoC. In addition, simulated results indicate that the static partitioning technique could be applied to application tasks before mapping activities in order to improve the quality of the static or dynamic mapping design and also to minimize the processing time.

KW - Heterogeneous MPSoC

KW - Mapping

KW - Partitioning

UR - https://www.scopus.com/pages/publications/84894518008

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DO - 10.1109/VLSID.2014.50

M3 - Conference contribution

AN - SCOPUS:84894518008

SN - 9781479925124

T3 - Proceedings of the IEEE International Conference on VLSI Design

SP - 252

EP - 257

BT - Proceedings - 27th International Conference on VLSI Design, VLSID 2014; Held Concurrently with 13th International Conference on Embedded Systems Design

T2 - 27th International Conference on VLSI Design, VLSID 2014 - Held Concurrently with 13th International Conference on Embedded Systems Design

Y2 - 5 January 2014 through 9 January 2014

ER -

Pre-mapping algorithm for heterogeneous MPSoCs

Abstract

Publication series

Conference

UN SDGs

Keywords

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