Lattice-based scheduling for multi-FPGA systems

Teng Yu; Bo Feng; Mark Stillwell; Liucheng Guo; Yuchun Ma; John Donald Thomson

Lattice-based scheduling for multi-FPGA systems

Teng Yu, Bo Feng, Mark Stillwell, Liucheng Guo, Yuchun Ma, John Donald Thomson

School of Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Accelerators are becoming increasingly prevalent in distributed computation. FPGAs have been shown to be fast and power efficient for particular tasks, yet scheduling on FPGA-based multi-accelerator systems is challenging when workloads vary significantly in granularity in terms of task size and/or number of computational units required. We present a novel approach for dynamically scheduling tasks on networked multi-FPGA systems which maintains high performance, even in the presence of irregular tasks. Our topological ranking-based scheduling allows realistic irregular workloads to be processed while maintaining a significantly higher level of performance than existing schedulers.

Original language	English
Title of host publication	Proceedings of the International Conference on Field-Programmable Technology 2018, Naha, Okinawa, Japan
Publisher	IEEE Press
Publication status	Published - 10 Dec 2018
Event	International Conference on Field-Programmable Technology (FPT'18) - Naha, Okinawa, Japan Duration: 10 Dec 2018 → 14 Dec 2018 http://www.fpt18.sakura.ne.jp/

Conference

Conference	International Conference on Field-Programmable Technology (FPT'18)
Abbreviated title	FPT'18
Country/Territory	Japan
City	Naha, Okinawa
Period	10/12/18 → 14/12/18
Internet address	http://www.fpt18.sakura.ne.jp/

Keywords

Runtime scheduling
Lattice
Representation
Multi-FPGA

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fpt18-p110(1)
© 2018, IEEE. This work has been made available online in accordance with the publisherâ€™s policies. This is the author created accepted version manuscript following peer review and as such may differ slightly from the final published version. The final published version of this work is available at https://ieeexplore.ieee.org/
Accepted author manuscript, 1.17 MB

Cite this

@inproceedings{69fde49c183442858bbab9050ae1933a,

title = "Lattice-based scheduling for multi-FPGA systems",

abstract = "Accelerators are becoming increasingly prevalent in distributed computation. FPGAs have been shown to be fast and power efficient for particular tasks, yet scheduling on FPGA-based multi-accelerator systems is challenging when workloads vary significantly in granularity in terms of task size and/or number of computational units required. We present a novel approach for dynamically scheduling tasks on networked multi-FPGA systems which maintains high performance, even in the presence of irregular tasks. Our topological ranking-based scheduling allows realistic irregular workloads to be processed while maintaining a significantly higher level of performance than existing schedulers.",

keywords = "Runtime scheduling, Lattice, Representation, Multi-FPGA",

author = "Teng Yu and Bo Feng and Mark Stillwell and Liucheng Guo and Yuchun Ma and Thomson, {John Donald}",

year = "2018",

month = dec,

day = "10",

language = "English",

booktitle = "Proceedings of the International Conference on Field-Programmable Technology 2018, Naha, Okinawa, Japan",

publisher = "IEEE Press",

note = "International Conference on Field-Programmable Technology (FPT'18), FPT'18 ; Conference date: 10-12-2018 Through 14-12-2018",

url = "http://www.fpt18.sakura.ne.jp/",

}

TY - GEN

T1 - Lattice-based scheduling for multi-FPGA systems

AU - Yu, Teng

AU - Feng, Bo

AU - Stillwell, Mark

AU - Guo, Liucheng

AU - Ma, Yuchun

AU - Thomson, John Donald

PY - 2018/12/10

Y1 - 2018/12/10

N2 - Accelerators are becoming increasingly prevalent in distributed computation. FPGAs have been shown to be fast and power efficient for particular tasks, yet scheduling on FPGA-based multi-accelerator systems is challenging when workloads vary significantly in granularity in terms of task size and/or number of computational units required. We present a novel approach for dynamically scheduling tasks on networked multi-FPGA systems which maintains high performance, even in the presence of irregular tasks. Our topological ranking-based scheduling allows realistic irregular workloads to be processed while maintaining a significantly higher level of performance than existing schedulers.

AB - Accelerators are becoming increasingly prevalent in distributed computation. FPGAs have been shown to be fast and power efficient for particular tasks, yet scheduling on FPGA-based multi-accelerator systems is challenging when workloads vary significantly in granularity in terms of task size and/or number of computational units required. We present a novel approach for dynamically scheduling tasks on networked multi-FPGA systems which maintains high performance, even in the presence of irregular tasks. Our topological ranking-based scheduling allows realistic irregular workloads to be processed while maintaining a significantly higher level of performance than existing schedulers.

KW - Runtime scheduling

KW - Lattice

KW - Representation

KW - Multi-FPGA

M3 - Conference contribution

BT - Proceedings of the International Conference on Field-Programmable Technology 2018, Naha, Okinawa, Japan

PB - IEEE Press

T2 - International Conference on Field-Programmable Technology (FPT'18)

Y2 - 10 December 2018 through 14 December 2018

ER -

Lattice-based scheduling for multi-FPGA systems

Abstract

Conference

Keywords

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Cite this