Abstract
A novel copper damascene process is reported for fabrication of Electrical Critical Dimension (ECD) reference material. The method of fabrication first creates an initial "silicon preform" whose linewidth is transferred into a trench using a silicon nitride mould. The trench is created by removing a portion of the silicon and replacing it with copper to enable both Transmission Electron Microscopy (TEM) and electrical linewidth measurements to be made on the same structure. The technique is based on the use of anisotropic wet etching of (110) silicon wafers to yield silicon features with vertical sidewalls. The paper demonstrates that this method successfully produces copper lines which serve as ECD control structures and the process can be applied to any damascene compatible material for developing electrical linewidth measurement reference material.
Original language | English |
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Title of host publication | 2006 International Conference on Microelectronic Test Structures - Digest of Technical Papers |
Pages | 124-129 |
Number of pages | 6 |
Volume | 2006 |
DOIs | |
Publication status | Published - 13 Oct 2006 |
Event | 2006 International Conference on Microelectronic Test Structures - Austin, TX, United States Duration: 6 Mar 2006 → 9 Mar 2006 |
Conference
Conference | 2006 International Conference on Microelectronic Test Structures |
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Country/Territory | United States |
City | Austin, TX |
Period | 6/03/06 → 9/03/06 |