Abstract
3D NoC-based architectures have emerged to reduce the network latency, the energy consumption and total area in comparison to 2D NoC topologies. However, they are characterized by various trade-offs with regard to the three dimensional structure and its performance specifications. In this paper, we present a 3D NoC mesh architecture called Lasio, whose latency and the throughput achieved, for both network and application, are evaluated considering two types of traffic patterns, varied buffer depth and a range of packet sizes. Cycle-accurate simulations demonstrated that there is a high impact of buffer depth and packet size on the NoC latency and on the application latency. Applying an appropriate buffer depth, for several sizes of packets, the application latency is reduced and throughput is increased.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 2012 23rd IEEE International Symposium on Rapid System Prototyping |
| Subtitle of host publication | Shortening the Path from Specification to Prototype, RSP 2012 |
| Pages | 9-15 |
| Number of pages | 7 |
| DOIs | |
| Publication status | Published - 2012 |
| Event | 23rd IEEE International Symposium on Rapid System Prototyping, RSP 2012 - Tampere, Finland Duration: 11 Oct 2012 → 12 Oct 2012 |
Publication series
| Name | Proceedings - IEEE International Symposium on Rapid System Prototyping, RSP |
|---|---|
| ISSN (Print) | 2150-5500 |
| ISSN (Electronic) | 2150-5519 |
Conference
| Conference | 23rd IEEE International Symposium on Rapid System Prototyping, RSP 2012 |
|---|---|
| Country/Territory | Finland |
| City | Tampere |
| Period | 11/10/12 → 12/10/12 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
Keywords
- 3D NoC
- Buffer depth
- Latency
- Throughput
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