Abstract
The use of integration of copper interconnects in semiconductor devices has greatly advanced the development of integrated circuits and has enabled ever higher device densities. Unfortunately the oxides of copper are poorly suited to semiconductor manufacture. As Cu (I) and Cu (II) oxides are not self-limiting they can pose serious issues from a cleaning and queue time management perspective. In both post-etch and post-CMP cleaning applications it is critical that both types of Cu oxide are removed without damage to either Cu or the dielectric. With the most advanced sub 32nm nodes simply removing the oxides is not sufficient; their re-growth must also be prevented using surface passivation.
| Original language | English |
|---|---|
| Title of host publication | Solid State Phenomena |
| Publisher | Trans Tech Publications |
| Pages | 231-234 |
| Volume | 187 |
| Publication status | Published - Apr 2012 |
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