A Better x86 Memory Model: x86-TSO

Scott Owens*, Susmit Sarkar, Peter Sewell

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

144 Citations (Scopus)

Abstract

Real multiprocessors do not provide the sequentially consistent memory that is assumed by most work oil semantics and verification. Instead, they have relaxed memory models, typically described in ambiguous prose, which lead to widespread confusion. These are prune targets for mechanized formalization. In previous work we produced a rigorous x86-CC model, formalizing the Intel and AMD architecture specifications of the time, but those turned out to be unsound with respect to actual hardware, a:3 well as arguably too weak to program above. We discuss these issue's and present a new x86-TSO model that suffers from neither problem, formalized in HOL4. We believe it is sound with respect; to real processors, reflects better the vendor's intentions, and is also better suited for programming. We give two equivalent definitions of x86-TSO: an intuitive operational model based on local write buffers, and an axiomatic total store ordering model, similar to that of the SPARCv8. Both are adapted to handle x86-specific features. We have implemented the axiomatic model in our memevents tool; which calculates the set of all valid executions of test programs, and, for greater confidence, verify the witnesses of such executions directly, with code extracted from a third, more algorithmic, equivalent version of the definition.

Original languageEnglish
Title of host publicationTHEOREM PROVING IN HIGHER ORDER LOGICS, PROCEEDINGS
EditorsS Berghofer, T Nipkow, C Urban, M Wenzel
Place of PublicationBERLIN
PublisherSpringer-Verlag
Pages391-407
Number of pages17
ISBN (Print)978-3-642-03358-2
Publication statusPublished - 2009
Event22nd International Conference on Theorem Proving in Higher Order Logics - Munich, Germany
Duration: 17 Aug 200920 Aug 2009

Publication series

NameLecture Notes in Computer Science
PublisherSPRINGER-VERLAG BERLIN
Volume5674
ISSN (Print)0302-9743

Conference

Conference22nd International Conference on Theorem Proving in Higher Order Logics
Country/TerritoryGermany
CityMunich
Period17/08/0920/08/09

Keywords

  • VERIFICATION

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